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This drawback is that the relays, some of which inevitably will require replacement, are typically more difficult to access than when they are located within PXI or VXI solutions. Accessibility of the relays should be a primary design consideration when locating switch cards inside of chassis..
Figure 15. shows an LXI switching mainframe. LXI is a fairly recent, and most welcome, addition to the arsenal of the ATE designer. The LXI solution combines the serviceability benefits of the PXI and VXI solution with most of the benefits of switching localized within the interface chassis. The two main factors favoring the switching localized within the interface chassis are:
-Significant interconnectivity among the relays. In this case a custom relay board will in turn significantly reduce the discrete wire count.
-Significant signal integrity issues that discourage running the signals through discrete wires.
If neither of these considerations applies to your application then an LXI solution may well be favored.
If custom relay boards make sense in your distributed switching architecture, then you may be faced with designing a multiplexer. Figure 16. shows an interconnection scheme that creates a multiplexer using Double Pole, Single Throw (DPST) relays. Relays one and two switch between the pole-sets and in combination with the other relays (three through eight) determine connection points. This design can create dense multiplex solutions, but there is a very specific risk with the paradigm, especially when used to multiplex a DMM. This issue occurs when the DMM is inadvertently connected to two measurement points that are at different voltage potentials. This can happen during the tester development phase, typically during software development, and it can happen in service if a relay fails in a closed position. The inadvertent connections create short circuits through which very large currents can flow. These currents will in turn weld more relays shut creating a domino effect that will damage the tester and potentially damage the UUT. The prudent ATE designer will place current limiting resistors in multiplexed paths whenever possible. The designer should choose the values of these resistors to limit damaging current while providing minimal impact to the measurement quality. Fuses can also be used to protect relays. If a hardware solution is not possible, then “lockout lists” of
forbidden combinations of relay states can be created and enforced in firmware or at the software driver
level.
IV. SUMMARY
Consider the following guidelines when choosing the
Automatic Test Equipment (ATE) switching architecture.
-If your application requires more than 1000 relay poles then a distributed switching architecture is likely the best choice.
-If your application requires less than 250 relay poles then the choice of switching architecture is likely less important than questions of geometry, space, etc.
-If your application requires a mass interconnect then you will be using a centralized switching architecture.
-If signal integrity issues are your primary concern then you should consider localized switching.
-If your application has interconnectivity among the relays beyond the typical multiplex or matrix arrangement then consider using custom relay boards.
-Protect the relays where possible with current limiting devices, such as resistors and fuses, or implement “lockout lists.”
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