III. DISTRIBUTED SWITCHING ARCHITECTURE
The distributed switching architecture is almost always going to be advised when the count of relay poles goes beyond 1000 due to the sheer length of the associated wiring. The primary exception to this rule is when the application demands a mass interconnect. Figure 12. shows a block diagram of this architecture with the distributed switching localized directly within the interface chassis.
Figure 13. shows the back panel of an interface chassis that follows the architecture shown in Figure 12. The chassis contains 220 Double Pole, Single Throw (DPST) two-amp relays; 128, five-amp relays; and 72, ten amp relays. In a centralized switching architecture this chassis alone would require over a mile of wire (with a good portion of it needing to be sized to carry appreciable amounts of current) and thirteen separate cards (if PXI is used). In this particular tester there are six chassis with roughly this amount of switching capacity.
Figure 14. shows a top view of the chassis. The chassis contains five
switch cards and a motherboard that also contains relays and the switching control. Though much care was taken in the design of this chassis, it aptly demonstrates the main drawback of switching localized within the interface